Simulating FPGA Power Integrity Using S-Parameter Models

نویسندگان

  • Jack Carrel
  • Ray Anderson
  • Harry Fu
چکیده

www.xilinx.com 1 © Copyright 2012 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. The purpose of a Power Distribution Network (PDN) is to provide power to electrical devices in a system. Each device in a system not only has its own power requirements for its internal operation, but also a requirement for the input voltage fluctuation of that power rail. For Xilinx KintexTM-7 and Virtex®-7 FPGAs, the analog power rails have an input voltage fluctuation requirement of not more than 10 mV peak-to-peak from the 10 kHz to the 80 MHz frequency range. The selfgenerated voltage fluctuation on the power rails is a function of frequency and can be described by Ohm's Law: Voltage (frequency) = Current (frequency) * Self-Impedance (frequency).

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

FPGA Implementation of a Hammerstein Based Digital Predistorter for Linearizing RF Power Amplifiers with Memory Effects

Power amplifiers (PAs) are inherently nonlinear elements and digital predistortion is a highly cost-effective approach to linearize them. Although most existing architectures assume that the PA has a memoryless nonlinearity, memory effects of the PAs in many applications ,such as wideband code-division multiple access (WCDMA) or orthogonal frequency-division multiplexing (OFDM), can no longer b...

متن کامل

مدل عملکردی تحلیلی FPGA برای پردازش با قابلیت پیکربندی مجدد

Optimizing FPGA architectures is one of the key challenges in digital design flow. Traditionally, FPGA designers make use of CAD tools for evaluating architectures in terms of the area, delay and power. Recently, analytical methods have been proposed to optimize the architectures faster and easier. A complete analytical power, area and delay model have received little attention to date. In addi...

متن کامل

FPGA Can be Implemented Using Advanced Encryption Standard Algorithm

This paper mainly focused on implementation of AES encryption and decryption standard AES-128. All the transformations of both Encryption and Decryption are simulated using an iterativedesign approach in order to minimize the hardware consumption. This method can make it avery low-complex architecture, especially in saving the hardware resource in implementing theAES InverseSub Bytes module and...

متن کامل

A Survey on Complexity of Integrity Parameter

Many graph theoretical parameters have been used to describe the vulnerability of communication networks, including toughness, binding number, rate of disruption, neighbor-connectivity, integrity, mean integrity, edgeconnectivity vector, l-connectivity and tenacity. In this paper we discuss Integrity and its properties in vulnerability calculation. The integrity of a graph G, I(G), is defined t...

متن کامل

S Developing Configurable Security Algorithms for Embedded System Storage

The constrained operating environments of many FPGA based embedded systems require flexible security that can be configured to minimize the impact on FPGA area and power consumption. To ensure the overall security of embedded systems with off-chip memories, it is essential to safeguard the confidentiality and integrity of the data that travels between the system-on-chip part of the embedded sys...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2009